J784S4 and AM69 Platforms

Introduction

The J784S4 SoC belongs to the K3 Multicore SoC architecture platform, providing advanced system integration in automotive, ADAS and industrial applications requiring AI at the network edge. This SoC extends the K3 Jacinto 7 family of SoCs with focus on raising performance and integration while providing interfaces, memory architecture and compute performance for multi-sensor, high concurrency applications.

The device is partitioned into three functional domains, each containing specific processing cores and peripherals:

1. Wake-up (WKUP) domain

   • ARM Cortex-M4F processor, runs TI Foundational Security (TIFS)

2. Microcontroller (MCU) domain

   • Dual core ARM Cortex-R5F processor, runs device management and SoC early boot

3. MAIN domain

   • Two clusters of quad core 64-bit ARM Cortex-A72, runs HLOS

   • Dual core ARM Cortex-R5F processor used for RTOS applications

   • Four C7x DSPs used for Machine Learning applications.

More info can be found in TRM: http://www.ti.com/lit/zip/spruj52

Platform information:

• https://www.ti.com/tool/J784S4XEVM

• https://www.ti.com/tool/SK-AM69

Boot Flow

Below is the pictorial representation of boot flow:

• On this platform, “TI Foundational Security” (TIFS) functions as the security enclave master. While “Device Manager” (DM), also known as the “TISCI server” in TI terminology, offers all the essential services.

• As illustrated in the diagram above, R5 SPL manages power and clock services independently before handing over control to DM. The A72 or the C7x (Aux core) software components request TIFS/DM to handle security or device management services.

Sources

• Das U-Boot

  source: https://source.denx.de/u-boot/u-boot.git

  branch: master

• Trusted Firmware-A (TF-A)

  source: https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/

  branch: master

• Open Portable Trusted Execution Environment (OP-TEE)

  source: https://github.com/OP-TEE/optee_os.git

  branch: master

• TI Firmware (TIFS, DM, SYSFW)

  source: https://git.ti.com/git/processor-firmware/ti-linux-firmware.git

  branch: ti-linux-firmware

Note

The TI Firmware required for functionality of the system can be one of the following combination (see platform specific boot diagram for further information as to which component runs on which processor):

• TIFS - TI Foundational Security Firmware - Consists of purely firmware meant to run on the security enclave.

• DM - Device Management firmware also called TI System Control Interface server (TISCI Server) - This component purely plays the role of managing device resources such as power, clock, interrupts, dma etc. This firmware runs on a dedicated or multi-use microcontroller outside the security enclave.

OR

• SYSFW - System firmware - consists of both TIFS and DM both running on the security enclave.

Build procedure

0. Setup the environment variables:

Generic environment variables

S/w Component	Env Variable	Description
All Software	CC32	Cross compiler for ARMv7 (ARM 32bit), typically arm-linux-gnueabihf-
All Software	CC64	Cross compiler for ARMv8 (ARM 64bit), typically aarch64-linux-gnu-
All Software	LNX_FW_PATH	Path to TI Linux firmware repository
All Software	TFA_PATH	Path to source of Trusted Firmware-A
All Software	OPTEE_PATH	Path to source of OP-TEE

Board specific environment variables

S/w Component	Env Variable	Description
U-Boot	UBOOT_CFG_CORTEXR	Defconfig for Cortex-R (Boot processor).
U-Boot	UBOOT_CFG_CORTEXA	Defconfig for Cortex-A (MPU processor).
Trusted Firmware-A	TFA_BOARD	Platform name used for building TF-A for Cortex-A Processor.
Trusted Firmware-A	TFA_EXTRA_ARGS	Any extra arguments used for building TF-A.
OP-TEE	OPTEE_PLATFORM	Platform name used for building OP-TEE for Cortex-A Processor.
OP-TEE	OPTEE_EXTRA_ARGS	Any extra arguments used for building OP-TEE.

Set the variables corresponding to this platform:

export CC32=arm-linux-gnueabihf-
export CC64=aarch64-linux-gnu-
export LNX_FW_PATH=path/to/ti-linux-firmware
export TFA_PATH=path/to/trusted-firmware-a
export OPTEE_PATH=path/to/optee_os

$ export UBOOT_CFG_CORTEXR=j784s4_evm_r5_defconfig
$ export UBOOT_CFG_CORTEXA=j784s4_evm_a72_defconfig
$ export TFA_BOARD=j784s4
$ export TFA_EXTRA_ARGS="K3_USART=0x8"
$ export OPTEE_PLATFORM=k3-j784s4
$ export OPTEE_EXTRA_ARGS="CFG_CONSOLE_UART=0x8"

1. Trusted Firmware-A

# inside trusted-firmware-a source
make CROSS_COMPILE=$CC64 ARCH=aarch64 PLAT=k3 SPD=opteed $TFA_EXTRA_ARGS \
     TARGET_BOARD=$TFA_BOARD

2. OP-TEE

# inside optee_os source
make CROSS_COMPILE=$CC32 CROSS_COMPILE64=$CC64 CFG_ARM64_core=y $OPTEE_EXTRA_ARGS \
      PLATFORM=$OPTEE_PLATFORM

3. U-Boot

• 3.1 R5

# inside u-boot source
make $UBOOT_CFG_CORTEXR
make CROSS_COMPILE=$CC32 BINMAN_INDIRS=$LNX_FW_PATH

• 3.2 A72

# inside u-boot source
make $UBOOT_CFG_CORTEXA
make CROSS_COMPILE=$CC64 BINMAN_INDIRS=$LNX_FW_PATH \
       BL31=$TFA_PATH/build/k3/$TFA_BOARD/release/bl31.bin \
       TEE=$OPTEE_PATH/out/arm-plat-k3/core/tee-raw.bin

Note

It is also possible to pick up a custom DM binary by adding TI_DM argument pointing to the file. If not provided, it defaults to picking up the DM binary from BINMAN_INDIRS. This is only applicable to devices that utilize split firmware.

Target Images

In order to boot we need tiboot3.bin, tispl.bin and u-boot.img. Each SoC variant (GP, HS-FS, HS-SE) requires a different source for these files.

• GP

  • tiboot3-j784s4-gp-evm.bin from step 3.1

  • tispl.bin_unsigned, u-boot.img_unsigned from step 3.2

• HS-FS

  • tiboot3-j784s4-hs-fs-evm.bin from step 3.1

  • tispl.bin, u-boot.img from step 3.2

• HS-SE

  • tiboot3-j784s4-hs-evm.bin from step 3.1

  • tispl.bin, u-boot.img from step 3.2

Image formats

• tiboot3.bin

• tispl.bin

R5 Memory Map

Region	Start Address	End Address
SPL	0x41c00000	0x41c40000
EMPTY	0x41c40000	0x41c61f20
STACK	0x41c65f20	0x41c61f20
Global data	0x41c65f20	0x41c66000
Heap	0x41c66000	0x41c76000
BSS	0x41c76000	0x41c80000
DM DATA	0x41c80000	0x41c84130
EMPTY	0x41c84130	0x41cff9fc
MCU Scratchpad	0x41cff9fc	0x41cffbfc
ROM DATA	0x41cffbfc	0x41cfffff

Switch Setting for Boot Mode

Boot Mode pins provide means to select the boot mode and options before the device is powered up. After every POR, they are the main source to populate the Boot Parameter Tables.

Boot Mode Pins for J784S4-EVM

The following tables show some common boot modes used on J784S4 EVM platform. More details can be found in the Technical Reference Manual: http://www.ti.com/lit/zip/spruj52 under the Boot Mode Pins section.

J784S4 EVM Boot Modes

Switch Label	SW11: 12345678	SW7: 12345678
SD	10000010	00000000
EMMC	10000000	01000000
OSPI	00000110	01000000
UART	00000000	01110000

For SW7 and SW11, the switch state in the “ON” position = 1.

Boot Mode Pins for AM69-SK

The following table show some common boot modes used on AM69-SK platform. More details can be found in the User Guide for AM69-SK: https://www.ti.com/lit/ug/spruj70/spruj70.pdf under the Bootmode Settings section.

AM69 SK Boot Modes

Switch Label	SW2: 1234
SD	0000
EMMC	0110
UART	1010

For SW2, the switch state in the “ON” position = 1.

Debugging U-Boot

See Common Debugging environment - OpenOCD: for detailed setup information.

Warning

OpenOCD support since: September 2023 (git master)

Until the next stable release of OpenOCD is available in your development environment’s distribution, it might be necessary to build OpenOCD from the source.

Debugging U-Boot on J784S4-EVM and AM69-SK

Integrated JTAG adapter/dongle: The board has a micro-USB connector labelled XDS110 USB or JTAG. Connect a USB cable to the board to the mentioned port.

Note

There are multiple USB ports on a typical board, So, ensure you have read the user guide for the board and confirmed the silk screen label to ensure connecting to the correct port.

To start OpenOCD and connect to J784S4-EVM or AM69-SK board, use the following.

openocd -f board/ti_j784s4evm.cfg